(1) Field of the Invention
The present invention relates to a semiconductor memory device and more particularly to a semiconductor memory device comprising clamp circuits, each of which is connected to an end of a word line and each of which operates reliably without being affected by the resistance of the word line.
(2) Description of the Prior Art
Generally, in a semiconductor memory device having a large memory capacity, there are provided clamp circuits, each clamp circuit being connected to one end of each word line. The clamp circuit is operated in accordance with the selecting voltage input thereto from a word decoder connected to the other end of the word line so that the potential of the word line rises sufficiently when the word line is selected, and so that the potential of the word line is clamped to a low voltage when the word line is not selected, thereby ensuring the selecting operation of the word line.
However, since the operation of each clamp circuit of a conventional semiconductor memory device is greatly influenced by the resistance of a corresponding word line, the selecting operation of the word line is not reliable when the resistance of the word line is relatively high.